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HiPEAC: European Network of Excellence on High Performance and Embedded Architecture and Compilation Funded under 6th FWP (Sixth Framework Program) (IST-004408)
Overall project summary: HiPEAC addresses the design and implementation of high-performance commodity computing devices in the 10+ year horizon, covering the processor design, the optimizing compiler infrastructure, and the evaluation of upcoming applications made possible by the increased computing power of future devices.
Total project duration: I.2004 – XII.2008
Contact person: Professor Mateo Valero, Technical University of Catalonia, Spain
Strictly connected to my PhD research. I was supported by several grants from the project that covered expenses related to summer schools and my internships. I developed significant part of my PhD Thesis during the latter.